The present invention is made in the field of optical interconnect technologies to advance optics into the module and chip level. The introduction of optical links into High Performance Computing (HPC) is a future option to allow scaling the manufacturing technology to large volume manufacturing. This will drive the need for manufacturability of optical interconnects, giving rise to other challenges that add to the realization of the interconnection. The present invention allows the creation of optical components on module level, integrating optical chips, laser diodes, or PIN diodes as components in a way which is comparable to SMD components used for electrical components.
Today's communication infrastructure is tightly connected to technological advances in computing, data storage, “big data” applications, and optical transport. The amount of data that is being transported has reached unseen and ever increasing volumes. Reducing power consumption on the processing side would trigger a cascade effect that further contributes to a reduction of power consumption. One of the designated technologies for advancing energy-saving computing systems is moving optical interconnects closer to the processor. The present invention proposes a means for manufacturing optical interconnects that allows scaling to high-volume manufacturing, as it is needed for proliferation of optical interconnects into the optical package, by an improved connection design of the optical components, thereby decreasing the necessity of accuracy in component mounting.
The evolution of electrical, electronic, and optical systems started with simple devices that were composed of individual parts joined together to perform a designated task. When the tasks got more elaborate, the systems got more complex and a more structured way of designing and manufacturing systems is required. This need was accompanied by technical evolution that allowed the condensation of functions into smaller, more integrated parts, e.g. integrated circuits (ICs). These ICs then were assembled on a substrate, which served as mechanical and electrical interconnection.
The interconnect hierarchy (Pinnel, M. R., Knausenberger, W. H., “Interconnection System Requirements and Modeling”, AT&T Technical Journal, 66(4), July/August 1987) describes the modularization of the connections to be made between the different levels of integration in the system. Interconnect Level 0 represents the interconnections of the single components on the chip, interconnect Level 1 the chip-to-package interconnections to form the IC package, interconnect Level 2 stands for the assembly of components to the printed circuit board (PCB), on interconnect Level 3 circuit boards are connected to racks, or multiple PCBs are connected to each other, and interconnect Level 4 is the wiring and cabling connection in the cabinet. On interconnect Level 5 cabinets are connected to each other, interconnect Level 6 connects the collection of cabinets with the “outside”, e.g. as connection out of a data center. Each integration level typically requires different types of interconnects. The present invention focuses mainly on interconnect Levels 1 and 2, which typically are similar in nature and, hence similarly created, but without excluding other Levels.
Data and power transport connections between different components in a system can be achieved through physically linking them. These links can be connected by hardware or materials, respectively, or it can be wireless. In the electrical domain, typical representations of material connections are solder joints in pin-in-hole and surface mount technology, galvanic connections, and welded or screwed contacts (in PCB Assembly) and connectors (to connect PCBs with larger components or cables). Wireless connections make use of electrical fields for data and/or power transport are, however, only used where not directly contacted by material. Only material connections shall be considered in the following.
A typical example for an interconnect on Level 2 is the soldered connection of an electrical component to the printed circuit board (PCB), which today is commonly attached in surface mount technology (SMT). Large components may be screwed to the PCB to enhance mechanical stability; this mechanical connection may also be an electrical connection (e.g. for ground). The large variety of interconnects results from the fact that the nature of electrons allows low-loss connectivity using all these different forms of interconnects. Standardization of manufacturing processes and materials has helped to advance the technology over the past 50 years to a point, where large volumes of interconnects can efficiently be created for even modestly complex products.
In the optical domain, similar representations exist: optical interconnects are usually material connections of light guides for enabling optical data and power transport; wireless transfer is represented by free-space optics. In the electrical domain, many different realizations of interconnects have been used for designing and building products. The number of optical interconnect types actually in use is lower as optical interconnects are much harder to manufacture efficiently in high volumes. In particular, the realization of interconnects on chip, package, and board level has been successful only in applications where electric interconnects could not compete for technical reasons, like bandwidth requirements, interference, and interconnect density. While means for creating low-loss optical connections on the chip, the package and the board level are known, the economically feasible realization has been a more difficult task. The nature of photons requires a more precise way of addressing the interconnect realization, which usually requires more precise alignment, and more complex interconnect designs, resulting from the available 2D technologies. As cost and energy consumption need to be taken into the equation, the manufacturability of the optical interconnects will be added to the list of requirements for volume manufacturing.
In the recent past work on the TERABUS system by IBM, the opportunities of optical modules were shown that are surface mount compatible, see Doany, F. E., “Power-Efficient, High-Bandwidth Optical Interconnects for High Performance Computing”, IEEE HOT Interconnects Symposium, Santa Clara, Calif., August 21-23, Doany F. E. et al., “Dense 24 Tx+24 Rx Fiber-Coupled Optical Module Based on a Holey CMOS Transceiver IC,” ECTC 2010, pp. 247-255, and Schow, C. L. et al., “A 24-Channel 300 Gb/s 8.2 pJ/bit Full-Duplex Fiber-Coupled Optical Transceiver Module Based on a Single “Holey” CMOS IC,” IEEE JLT, February 2011. The chip was mounted on a substrate carrier allowing it to be assembled like an electrical SMT device. The interconnection of the “holey” optochip to the waveguides was done using free-space optics with a lens arrangement, requiring (a) additional alignment steps to align the lens array with the mirror array reflecting the light out of the plane of the waveguides, (b) creation of the mirror array using laser ablation (which is a rather “messy process”), and (c) the alignment of the chip to the lens array. By eliminating the lens array, the need for total internal reflection optics on the waveguides and elimination of the alignment of parts a much simpler process seems possible that allows an even more manufacturable process to be implemented.
The creation of optical interconnects has been addressed by many groups over the past decades, mainly in the form of optical waveguides (OW). Waveguides were created using technologies like photolithography, hot embossing/micro molding, laser ablation, or laser direct writing. Other methods include photo bleaching, ion diffusion, and two-photon absorption (TPA) using non-linear optics (Houbertz, R. et al., Proc. SPIE 7053, 70530B (2008)). While some of the technologies for making waveguides have reached a level of sophistication that would allow the transfer to volume manufacturing, further challenges remain for integrating these waveguides into existing electrical solutions. As optical waveguides represent only one portion of the functions required in an optical system, additional development needs to be done to account for the complete system to deliver an added value to the final product.
These waveguide manufacturing technologies can in principle be used for achieving optical connectivity, but it will be hard for most of them to scale to high volume manufacturing. This is true not only for multi-mode waveguides, but in particular for single-mode waveguides. The prime reason is the required precision of the alignment of the optical components to the waveguides. State-of-the-art assembly equipment is capable of both, handling substrates and dies, but will be very slow and costly when sub-micron precision is required. This is critical for scaling to large volumes of product. In addition, the alignment of more than one input/output (I/O) from an optical arrangement, an optical chip or a laser bar will be even harder than for a single I/O. Current state-of-the-art in assembly is active alignment, where the device needs to be powered up and emit/receive light like in live operation. While active alignment is common practice, passive alignment is the preferred choice as it is faster and simpler to implement.
However, the main and fundamental challenge of creating optical interconnects (01) has not been addressed adequately.
To understand the challenge better, a look to the electronics manufacturing industry is helpful. Scaling of manufacturing of products to high volume manufacturing has been demonstrated by this industry. It could also serve as a role model for the optoelectronics industry. Electronics manufacturing has come a long way of putting more computing power into silicon, and more integration capability into Level 1 and Level 2 packaging. Enabling the OI to be efficiently manufactured will allow optical technologies to advance into interconnect Levels 0 to 2.
Extending the idea, it might be helpful to consider various alternatives of interconnecting components on different interconnect levels.
The interconnect hierarchy (see Pinnel, M. R. et al., above and Fjelstad, J., “Rethinking the Hierarchy of Electronic Interconnections,” IPC Outlook, 28 Dec. 2012) logically partitions a system into various levels that are interconnected by physical connections. The model had been created and is used for electrical connections, but may well be applied to understand the system partitioning in the optical domain as well. It is helpful to understand the complexity that interconnects may have on the respective levels, or, in other terms, on which level complexity is best aggregated to eliminate the need for complex interconnects. As only a few standards exist today with respect to optical interconnections, let alone system design, variations of system concepts will persist, and today's solutions will remain specific to individual systems. In the following, two examples are given that outline the concept.
On Level 1, optical chips are connected to their package. The chips might come with only one optical I/O, or with many. Thus, either a single interconnect needs to be formed, or multiple. In both cases, the optical output of the chip needs to be precisely aligned to the waveguide or the free-space optical system comprising lenses. A repeatable and standardized manufacturing process will be required to deliver optical packages that can be used in large-scale systems. The complexity of the technical solution will inherently influence the scalability of the system. When making the decision for a particular solution, the manufacturability of the optical interconnect is determined by (a) how light is delivered (input), (b) how light needs to be taken from the input to the output, (c) how light is delivered at the output of the waveguide (or free-space optics), (d) the environmental conditions under which the module needs to operate, (e) the reliability (MTTF, MTBF), (f) manufacturing yield, and (g) cost.
On Level 2, the module-to-PCB interconnect level, the optical connection between the package and the substrate is formed. The main challenge is the registration tolerance that needs to be reached during assembly and maintained during operational life. Also, the number of interconnects to be simultaneously formed will be critical, as multiple I/Os will require a precise positioning of interconnects with respect to each other. Thus, the module I/Os are imposing tight design rules for the counterpart on the substrate/PCB side, which needs to be ideally matched. While solutions like arrayed lens coupling can be used, the registration of the module to the lens array is still critical. In addition to the proposed free-space lens array coupling solutions, optical connectors might be used. These again will require an optical interface to be created to them, which merely shifts the problem, and adds more complexity to the process. On Level 2, the reduction of the number of process steps is even more critical, as Level 2 is the most cost sensitive interconnect level in the value chain.
An alternative and potentially more attractive approach on Level 2 is the separation of the electrical and the optical interconnects, which would lead to system concepts where optical connectivity on Level 2 is provided through optical cables. A similar concept has been described in Fjelstad J. C. et. al, “Direct-connect integrated circuit signaling system for bypassing intra-substrate printed circuit signal paths”, U.S. Pat. No. 7,307,293, 11 Dec. 2007, for high frequency electrical signal transmission.
Existing manufacturing processes for optical waveguides have not been able to meet all requirements for high volume manufacturing of integrated optical modules. In order to allow the elimination of most of the drawbacks, the present invention provides a new interconnection technology and manufacturing process flow that, moreover, is scalable to volume manufacturing. In addition to the new way of creating the waveguide structures, a fundamental paradigm shift for the process sequence for the assembly process is proposed. The process of the invention can be used for creating optical components that can be used like electrical modules during assembly, while exhibiting the performance of optical modules or optical multi-chip modules (OMCM). The paradigm shift becomes possible due to a process which provides, at the time of creating the optical interconnection(s) of the respective components, a mechanical fixation of these components. Consequently, mechanically stable optical modules can be provided, which may even lack a substrate, and their preparation does not require more than an active or passive structure having at least one optical input and/or output as the optical equipment, and a chemical material which can be structured by TPA and which, upon at least one curing step, provides the mechanical stability of the optical module.